JTAGSWD Interface - Documentation
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Serial Wire Debug is a 2-pin electrical alternative JTAG interface that has the same JTAG protocol on top SWD uses an ARM CPU standard SLOT 1 SLOT 2 SLOT 3 SLOT 4 SLOT 5 SLOT 6 650 1K2 - Parallel 可以复用为SWD下载方式，那么PB4就可以“省出来了1 (RCC_APB2Periph_GPIOB
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